PWM Chip Slow CLK Fall Time - John Dunn, Consultant, Ambertec, P.E., P.C.

An industry standard PWM chip in this particular switchmode supply was driving a type 4013 D-type flip-flop using that PWM chip's clock (CLK) output. The 4013's response to this drive was sporadic. The 4013 would toggle properly on each rising edge of CLK, but would often toggle improperly on the falling edges of CLK which would mess things up quite badly.

The reason turned out to be that the falling edge of CLK was very much slower that the rising edge and with just a little bit of noise on that falling edge, would upwardly cross the threshold voltage of the 4013 clock input "C" and cause the unintended toggling. Note that the 4013 has no input Schmitt trigger which might have prevented this trouble.      

 

The remedy was to put an RC pair in series with the 4013's feedback path from Q-bar to D so that false triggers would not induce unwanted toggling.

In the sketch below, the model was set up so that the 4013 would toggle on every edge of CLK, both rising and falling, effectively modeling the worst possible case of improper triggering. Then the RC pair was introduced into the model and its behavior examined for the high and low extremes of the 4013's triggering threshold voltage.       

 

The RC provides a memory of sort to the D-input so that false triggers from the falling edges of CLK simply repeat for the D-input, the voltage that input had been given by Q-bar at the proper triggering moment.

This worked out just fine. Later however, in some idle time chit-chat with an engineer from the PWM chip company, it was suggested that the CLK output fall times could be speeded up by placing a 1K from the CLK pin to ground.

There was nothing official about that idea and I never got around to trying it, but I still bear it in mind for possible use some day.

Comments

[Anthony Esposito]

PWM chip is UC3825, yes?

[John Dunn]

Actually, it was the 1825. The project was a spacecraft power supply.